This is the complete list of members for m5::BMI270_Class, including all inherited members.
| _addr | m5::I2C_Device | protected |
| _freq | m5::I2C_Device | protected |
| _i2c | m5::I2C_Device | protected |
| _init | m5::I2C_Device | protected |
| _upload_file(const std::uint8_t *config_data, std::size_t index, std::size_t write_len) | m5::BMI270_Class | protected |
| ACC_CONF_ADDR | m5::BMI270_Class | static |
| ACC_OFF_COMP_0_ADDR | m5::BMI270_Class | static |
| ACC_SELF_TEST_ADDR | m5::BMI270_Class | static |
| ACC_X_LSB_ADDR | m5::BMI270_Class | static |
| AUX_CONF_ADDR | m5::BMI270_Class | static |
| AUX_DEV_ID_ADDR | m5::BMI270_Class | static |
| AUX_IF_CONF_ADDR | m5::BMI270_Class | static |
| AUX_IF_TRIM | m5::BMI270_Class | static |
| AUX_RD_ADDR | m5::BMI270_Class | static |
| AUX_WR_ADDR | m5::BMI270_Class | static |
| AUX_WR_DATA_ADDR | m5::BMI270_Class | static |
| AUX_X_LSB_ADDR | m5::BMI270_Class | static |
| auxReadRegister8(std::uint8_t reg) | m5::BMI270_Class | protected |
| auxSetupMode(std::uint8_t i2c_addr) | m5::BMI270_Class | protected |
| auxWriteRegister8(std::uint8_t reg, std::uint8_t data) | m5::BMI270_Class | protected |
| begin(I2C_Class *i2c=nullptr) override | m5::BMI270_Class | virtual |
| bitOff(std::uint8_t reg, std::uint8_t bit) const | m5::I2C_Device | inline |
| bitOn(std::uint8_t reg, std::uint8_t bit) const | m5::I2C_Device | inline |
| BMI270_Class(std::uint8_t i2c_addr=DEFAULT_ADDRESS, std::uint32_t freq=400000, I2C_Class *i2c=&In_I2C) | m5::BMI270_Class | |
| CHIP_ID_ADDR | m5::BMI270_Class | static |
| CMD_REG_ADDR | m5::BMI270_Class | static |
| DEFAULT_ADDRESS | m5::BMI270_Class | static |
| ERR_REG_ADDR | m5::BMI270_Class | static |
| EVENT_ADDR | m5::BMI270_Class | static |
| FEAT_PAGE_ADDR | m5::BMI270_Class | static |
| FEATURES_REG_ADDR | m5::BMI270_Class | static |
| FIFO_CONFIG_0_ADDR | m5::BMI270_Class | static |
| FIFO_CONFIG_1_ADDR | m5::BMI270_Class | static |
| FIFO_DATA_ADDR | m5::BMI270_Class | static |
| FIFO_DOWNS_ADDR | m5::BMI270_Class | static |
| FIFO_FLUSH_CMD | m5::BMI270_Class | static |
| FIFO_LENGTH_0_ADDR | m5::BMI270_Class | static |
| FIFO_WTM_0_ADDR | m5::BMI270_Class | static |
| FIFO_WTM_1_ADDR | m5::BMI270_Class | static |
| G_TRIGGER_CMD | m5::BMI270_Class | static |
| getConvertParam(imu_convert_param_t *param) const override | m5::BMI270_Class | virtual |
| getImuRawData(imu_raw_data_t *data) const override | m5::BMI270_Class | virtual |
| getTempAdc(int16_t *adc) const override | m5::BMI270_Class | virtual |
| GYR_CAS_GPIO0_ADDR | m5::BMI270_Class | static |
| GYR_CONF_ADDR | m5::BMI270_Class | static |
| GYR_CRT_CONF_ADDR | m5::BMI270_Class | static |
| GYR_OFF_COMP_3_ADDR | m5::BMI270_Class | static |
| GYR_OFF_COMP_6_ADDR | m5::BMI270_Class | static |
| GYR_SELF_TEST_AXES_ADDR | m5::BMI270_Class | static |
| GYR_USR_GAIN_0_ADDR | m5::BMI270_Class | static |
| GYR_X_LSB_ADDR | m5::BMI270_Class | static |
| I2C_Device(std::uint8_t i2c_addr, std::uint32_t freq, I2C_Class *i2c=&In_I2C) | m5::I2C_Device | inline |
| IF_CONF_ADDR | m5::BMI270_Class | static |
| IMU_Base(std::uint8_t i2c_addr, std::uint32_t freq=400000, I2C_Class *i2c=&In_I2C) | m5::IMU_Base | |
| imu_spec_accel enum value | m5::IMU_Base | |
| imu_spec_gyro enum value | m5::IMU_Base | |
| imu_spec_mag enum value | m5::IMU_Base | |
| imu_spec_none enum value | m5::IMU_Base | |
| imu_spec_t enum name | m5::IMU_Base | |
| INIT_ADDR_0 | m5::BMI270_Class | static |
| INIT_ADDR_1 | m5::BMI270_Class | static |
| INIT_CTRL_ADDR | m5::BMI270_Class | static |
| INIT_DATA_ADDR | m5::BMI270_Class | static |
| INT1_IO_CTRL_ADDR | m5::BMI270_Class | static |
| INT1_MAP_FEAT_ADDR | m5::BMI270_Class | static |
| INT2_IO_CTRL_ADDR | m5::BMI270_Class | static |
| INT2_MAP_FEAT_ADDR | m5::BMI270_Class | static |
| INT_LATCH_ADDR | m5::BMI270_Class | static |
| INT_MAP_DATA_ADDR | m5::BMI270_Class | static |
| INT_STATUS_0_ADDR | m5::BMI270_Class | static |
| INT_STATUS_1_ADDR | m5::BMI270_Class | static |
| INTERNAL_STATUS_ADDR | m5::BMI270_Class | static |
| isEnabled(void) const | m5::I2C_Device | inline |
| NV_CONF_ADDR | m5::BMI270_Class | static |
| NVM_CONF_ADDR | m5::BMI270_Class | static |
| NVM_PROG_CMD | m5::BMI270_Class | static |
| PWR_CONF_ADDR | m5::BMI270_Class | static |
| PWR_CTRL_ADDR | m5::BMI270_Class | static |
| readRegister(std::uint8_t reg, std::uint8_t *result, std::size_t length) const | m5::I2C_Device | inline |
| readRegister8(std::uint8_t reg) const | m5::I2C_Device | inline |
| SC_OUT_0_ADDR | m5::BMI270_Class | static |
| SELF_TEST_MEMS_ADDR | m5::BMI270_Class | static |
| SENSORTIME_ADDR | m5::BMI270_Class | static |
| setINTPinActiveLogic(bool level) | m5::IMU_Base | inlinevirtual |
| setPort(I2C_Class *i2c) | m5::I2C_Device | inline |
| SOFT_RESET_CMD | m5::BMI270_Class | static |
| STATUS_ADDR | m5::BMI270_Class | static |
| SYNC_COMMAND_ADDR | m5::BMI270_Class | static |
| TEMPERATURE_0_ADDR | m5::BMI270_Class | static |
| USR_GAIN_CMD | m5::BMI270_Class | static |
| WhoAmI(void) | m5::BMI270_Class | |
| writeRegister(std::uint8_t reg, const std::uint8_t *data, std::size_t length) const | m5::I2C_Device | inline |
| writeRegister8(std::uint8_t reg, std::uint8_t data) const | m5::I2C_Device | inline |
| writeRegister8Array(const std::uint8_t *reg_data_array, std::size_t length) const | m5::I2C_Device | |
| ~BMI270_Class() | m5::BMI270_Class | virtual |
| ~IMU_Base() | m5::IMU_Base | virtual |